1. Field of the Invention
The present invention relates to the control of a thyristor used in a rectifying bridge. The present invention more specifically relates to thyristors used in rectifying bridges with a filtered output, that is, where the need for turning on the thyristor is not synchronous with the zero crossings of the A.C. supply voltage of the bridge.
2. Discussion of the Related Art
FIG. 1 shows the electric diagram of a composite fullwave rectifying bridge of the type to which the present invention applies. More generally, the present invention applies to any filtered rectifying bridge, whatever the number of exploited phases of the A.C. input signal.
Composite bridge 1 of FIG. 1 is formed of two thyristors TH1 and TH2 and of two diodes D1 and D2 connected in two parallel branches of the bridge between two respective positive and reference output terminals 2 and 3. Terminals 2 and 3 are intended to provide the rectified voltage which is filtered by means of a capacitor C to provide a filtered D.C. supply voltage Vout to a load 4 (Q). Two input terminals 5 and 6 of bridge 1 receive an A.C. voltage Vin. Terminals 5 and 6 are connected to the respective interconnection points of the series connections of the thyristors and diodes, respectively TH1-D1 and TH2-D2.
Thyristors TH1 and TH2 are controlled by a circuit 7 (CTRL) providing the signals adapted to turning on the thyristors when A.C. input voltage Vin exceeds output voltage Vout, to cause the recharge of capacitor C.
FIG. 2 illustrates, in a timing diagram, the operation of a composite bridge such as illustrated in FIG. 1 with a control of thyristors TH1 and TH2 by a constant current. In other words, in this example, control circuit 7 provides a constant current to the respective gates G1 and G2 of thyristors TH1 and TH2.
In FIG. 2, output voltage Vout has been shown in full line while rectified A.C. input voltage Vin (unfiltered) has been represented by a dotted line designated as Vinr. As is known, voltage Vout follows the course of voltage Vinr only during on periods of the rectifying bridge to recharge capacitor C. Between these periods, capacitor C discharges into load 4, which decreases voltage Vout.
In the first halfwave illustrated in FIG. 2, a turning-on of the thyristors at a time t1 is assumed. Only one of thyristors TH1 or TH2 conducts and recharges the capacitor until the middle of the halfwave. The second halfwave illustrated in FIG. 2 assumes a variation in the current surged by the load. In this example, an increase of the load is assumed, causing a decrease of voltage Vout faster than before the first halfwave. In this case, time t2 of conduction of the bridge thyristors is advanced with respect to what this conduction time (t1′) would have been with no modification of the load. In the second halfwave, the conducting thyristor is not the same as in the first halfwave. However, this changes nothing with respect to the operating principles.
The example of FIG. 2 illustrates a control posing no synchronization problem since, as soon as the voltage across one of the thyristors becomes positive, said thyristor closes instantaneously, with no current peak problem (high di/dt) at the closing.
However, according to the type of thyristor used to form the bridge, other problems are encountered.
If sensitive thyristors are used, that is, thyristors only requiring a small gate current (a few tens of microamperes), to minimize losses linked to the supply of the gate current, a parasitic triggering problem appears since this type of thyristor has a poor immunity against voltage variations thereacross.
To avoid this untimely triggering, less sensitive thyristors may be chosen. However, the losses are then high since the thyristor requires a gate current on the order of a few tens of milliamperes to be made conductive. Such a gate current generates a strong reverse current and losses of a few watts to be compared with the some ten milliwatts of low-sensitivity thyristors.
In practice, a compromise must be made between the gate current necessary to trigger the thyristors and the immunity against voltage variations thereacross.
FIG. 3 illustrates, in a timing diagram, a second conventional example of control of thyristors of a composite bridge. In this case, the control is a pulse control. Control circuit 7 provides, permanently, a pulse train (illustrated in FIG. 3) having a pulsewidth provided to ensure a sufficient conduction (a current greater than the thyristor latching current) before the pulse disappears. Referring to the example of FIG. 2, that is, in a first halfwave of rectified A.C. voltage Vinr where a crossing of curves Vout and Vinr occurs again at a time t1, the triggering (closing of thyristor TH1 or TH2) is not necessarily instantaneous. In the example shown, time t1 is subsequent to a pulse and the beginning of the next current pulse Imp1 must thus be awaited to trigger the thyristor closing. As in FIG. 2, the second halfwave of curve Vinr illustrates the case of an increase in the load supplied by the rectifying bridge. Here again, pulse Imp2 triggering the closing of one of the thyristors may be subsequent to time t2. The maximum interval between the time when curves Vout and Vinr cross and the thyristor closing is conditioned by the pulse frequency.
Such a pulse train control enables using low-sensitivity thyristors, that is, thyristors requiring high gate currents while limiting reverse losses due to the absence of a constant current supplying the gates.
However, a major disadvantage of this solution is that it generates harmonic disturbances resulting from the current peaks occurring due to the interval between times t1 and t2 and the beginning of pulses Imp1 and Imp2. The current peaks generate electromagnetic disturbances incompatible with some applications. To reduce electromagnetic disturbances, a solution would consist of increasing the pulse frequency. However, this then increases losses since the current becomes closer and closer to a constant gate current.